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 SPECIFICATION
Device Name Type Name Spec. No. :
: :
IGBT - IPM 7MBP75RTB060 MS6M 0653
Fuji Electric Co.,Ltd. Matsumoto Factory
Sep. 17 '02 K.Sekigawa Sep. 17 '02 Sep.-17 -'02 Nishiura K.Yamada T.Fujihira
MS6M 0653
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Revised Records
Date Classification Ind. Content Applied date Issued date Drawn Checked
Nishiura K.Yamada
Approved
Sep.-17-'02
enactment
K.Sekigawa
T.Fujihira
Apr.-09-'03
Revision
a
Reliability Test Items.
Apr.-09-'03
N.Matsuda
T.Miyasaka K.Yamada
T.Fujihira
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7MBP75RTB060
1. Outline Drawing ( Unit : mm ) a
Package type : P610
1 3 . 8 0.3
3 . 2 2 0.3
1 0 9 1 9 5 0.3 67.4
1 0 . 1 6 0.2 1 0 . 1 60.2 1 0 . 1 60.2 1 5 . 2 40.25 5 . 0 80.15 5 . 0 80.15 5 . 0 80.15 2 . 5 4 0.1
4- 5 . 5
2 0.3
1
4
7
10
16
B
7 4 0.3 8 8 1 20
P
20
10
N
0.5 17
W
V
U
0.5
24
26
26
16- 0 . 6 4 2-2 . 5
6-M5
2 2 -0.3
+1.0
7 14.5 8 -0.2
+1.0
2 2 -0.3
+1.0
9 31
Lot No.
Indication of Lot No. Odered No. in monthly Manufactured month (Jan.Sep.:19,Oct.:O,Nov.:N,Dec.:D) Last digit of manufactured year
3 . 2 2 0.3 2 . 5 4 0.1 2 . 5 4 0.1 222 2 . 5 4.5
(11.5) (12) 0.64
80.3
1
10
0.1max
Details of control terminals
Dimensions in mm
17
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2Pin Descriptions Main circuit Symbol P U V W N B Description Positive input supply voltage. Output (U). Output (V). Output (W). Negative input supply voltage. Collector terminal of Brake IGBT.
Control circuit Symbol GNDU High side ground (U). VinU VccU Logic input for IGBT gate drive (U). High side supply voltage (U). Description

GNDV High side ground (V). VinV VccV Logic input for IGBT gate drive (V). High side supply voltage (V).

GNDW High side ground (W). VinW VccW Logic input for IGBT gate drive (W). High side supply voltage (W).

GND Vcc
Low side ground. Low side supply voltage.
VinDB Logic input for Brake IGBT gate drive. VinX VinY VinZ ALM Logic input for IGBT gate drive (X). Logic input for IGBT gate drive (Y). Logic input for IGBT gate drive (Z). Low side alarm signal output.
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3. Block Diagram
VccU VinU GNDU VccV cV VinV GNDV VccW VinW
3
P
Pre- Driver VZ
2 1 6
U
5 VZ 4 9
Pre- Driver
V
8 VZ
Pre- Driver
GNDW 7 Vcc VinX GND
11
W
13
Pre- Driver VZ
10
VinY
14
Pre- Driver VZ
VinZ
15
Pre- Driver VZ
B VinDB
Pre- Driver VZ
12
N
RALM
ALM
16
Over heat ing prot ect ion circuit
1. 5k
Pre-drivers include following functions 1 Amplifier for driver 2 Short circuit protection 3 Under voltage lockout circuit 4 Over current protection 5 IGBT chip over heating protection
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4Absolute Maximum Ratings Tc25 unless otherwise specified. Items Bus Voltage (between terminal P and N) Collector-Emitter Voltage *1
DC DC Surge Shortoperating
Symbol VDC VDC(surge) Vsc Vces Ic Icp -Ic Pc Ic Icp IF Pc Vcc Vin Iin VALM ALM Tj Topr Tstg Viso -
Min. 0 0 200 0 -0.5 -0.5 -0.5 -20 -40 -
Max. 450 500 400 600 75 150 75 198 50 100 50 198 20 Vcc+0.5 3 Vcc 20 150 100 125 AC2500 3.5
Units V V V V A A A W A A A W V V mA V mA V Nm
Inverter
Collector Current
Collector Power Dissipation
1ms Duty=75.0 % *2 One transistor *3 DC 1ms
Collector Current Brake Forward Current of Diode
Collector Power Dissipation
One transistor *3
Supply Voltage of Pre-Driver *4 Input Signal Voltage *5 Input Signal Current Alarm Signal Voltage *6 Alarm Signal Current *7 Junction Temperature Operating Case Temperature Storage Temperature Isolating Voltage (Terminal to base, 50/60Hz sine wave 1min.) *8 Screw Torque Terminal(M5) Mounting(M5)
Note
*1 Vces shall be applied to the input voltage between terminal P and U or or W or DB, N and U or V or W or DB *2 125/FWD Rth(j-c)/(IcxVF MAX)=125/0.855/(75x2.6)x100=75.0% *3 Pc=125/IGBT Rth(j-c)=125/0.63=198W [Inverter] Pc=125/IGBT Rth(j-c)=125/0.63=198W [Break] *4 VCC shall be applied to the input voltage between terminal No.3 and 1,6 and 4, 9 and 7, 11 and 10. *5 V shall be applied to the input voltage between terminal No.2 and 1, 5 and 4, 8 and 7, 13,14,15 and 10. *6 shall be applied to the voltage between terminal No.16 and 10. *7 shall be applied to the input current to terminal No.16. *8 50Hz/60Hz sine wave 1 minute.
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5. Electrical Characteristics Tj25Vcc15V unless otherwise specified. 5.1 Main circuit Item Collector Current at off signal input Symbol ICES Conditions 600V Vin terminal open. 75A Terminal Chip -75A Terminal Chip 600V Vin terminal open. 50A Terminal Chip -50A Terminal Chip VDC300VTj=125 Ic75AFig.1Fig.6 VDC300V IF75A Fig.1Fig.6 PAV Maximum AvalancheEnergy (A non-repetition) internal wiring inductance50nH Main circuit wiring inductance54nH 40 mJ Min. 1.2 Typ. 2.0 1.6 1.75 1.9 Max. 1.0 2.4 2.6 1.0 2.2 3.3 3.6 0.3 us Units mA V V mA V V
Inverter
Collector-Emitter saturation voltage Forward voltage of FWD Collector Current at off signal input
VCE
VF
ICES
Brake
Collector-Emitter saturation voltage Forward voltage of Diode
VCE
VF ton toff trr
Turn-on time Turn-off time Reverse recovery time
5.2 Control circuit Item Supply current of P-side pre-driver (one unit) Supply current of N-side pre-driver Input signal threshold voltage Input Zener Voltage Vin(th) Vz ON OFF Rin20k Tc-20Fig.2 Alarm Signal Hold Time tALM Tc25Fig.2 Tc125Fig.2 Current Limit Resistor RALM Alarm terminal Symbol Iccp Iccn Conditions Switching Frequency : 015kHz Tc-20125 Fig.7 Min. Typ. Max. 18 Units mA
1 1.25 1.1 1425
1.35 1.6 8.0 2.0 1500
65 1.7 1.95 4.0 1575
mA
V V
ms
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5.3 Protection Section Vcc Item Over Current Protection Level of Inverter circuit Over Current Protection Level of Brake circuit Over Current Protection Delay time SC Protection Delay time IGBT Chips Over Heating Protection Temperature Level Over Heating Protection Hysteresis Over Heating Protection TemperatureLevel Over Heating Protection Hysteresis Under Voltage Protection Level Under Voltage Protection Hysteresis 6. Thermal Characteristics Item Junction to Case Thermal Resistance *9 Brake Inverter IGBT FWD IGBT Symbol Rth(j-c) Rth(j-c) Rth(j-c) Rth(c-f) 0.05 Min. Typ. Max. 0.63 0.855 0.63 /W Units TcH VUV VH TjH TOH VDC=0V,IC=0A CaseTemperature 11 0.2 20 0.5 12.5 V tdoc tsc TjOH Tj=125 Tj=125 Fig.4 Surface ofIGBT Chips 110 20 125 150 5 8 us us Ioc Tj=125 75 Symbol Conditions Tj=125 Min. 113 Typ. Max. A Units
Case to Fin Thermal Resistance with Compound 7. Noise Immunity Item Common mode rectangular noise Common mode lightning surge
Vdc=300VVcc=15VTest Circuit Fig 5. Conditions Pulse width 1us,polarity ,10 minuets Judgeno over-current, no miss operating
Rise time 1.2us,Fall time 50usInterval 20s,10 times
Min. 2.0
Typ. -
Max. -
Units kV
5.0
-
-
kV
Judgeno over-current, no miss operating
8. Recommended Operating Conditions Item DC Bus Voltage Power Supply Voltage of Pre-Driver Screw Torque (M5) 9. Weight Item Weight *9( For 1device Case is under the device )
a
Symbol VDC Vcc -
Min. 13.5 2.5
Typ. 15 -
Max. 400 16.5 3
Units V V Nm
Symbol Wt
Min. -
Typ. 450
Max. -
Units g
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f f
1
Figure 1. Switching Time Waveform Definitions
/Vin Vge (Inside IPM) Fault (Inside IPM) /ALM
off on Gate On Gate Off on
off
normal alarm tALMMax. tALMMax. tALM 2ms(typ.)
FaultOver-current,Over-heat or Under-voltage
Figure 2. Input/Output Timing Diagram
Necessary conditions for alarm reset (refer to to in figure2.) This represents the case when a failure-causing Fault lasts for a period more than tALM. The alarm resets when the input Vin is OFF and the Fault has disappeared. This represents the case when the ON condition of the input Vin lasts for a period more than tALM. The alarm resets when the Vin turns OFF under no Fault conditions. This represents the case when the Fault disappears and the Vin turns OFF within tALM. The alarm resets after lasting for a period of the specified time tALM.
/Vin off on Ioc on
Ic
/ALM
tdoc
alarm tdoc
Figure 3. Over-current Protection Timing Diagram
Period :
When a collector current over the OC level flows and the OFF command is input within a period less than the trip delay time tdoc, the current is hard-interrupted and no alarm is output.
Period :
When a collector current over the OC level flows for a period more than the trip delay time tdoc, the current is soft-interrupted. If this is detected at the lower arm IGBTs, an alarm is output.
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t SC
Ic IALM
Ic
Ic
IALM
IALM
Figure.4 Definition of tsc
VccU DC 15V
SW1 20k
P IPM
CT
VinU
U
AC200V
GNDU Vcc DC 15V
SW2 20k
V
+
VinX
W
4700p Noise
GND Earth
N
Cooling Fin
Figure 5. Noise Test Circuit
Vcc DC 15V
HCPL4504
P IPM L + DC 300V
20k
Vin
GND
N
Ic
Figure 6. Switching Characteristics Test Circuit
Icc
A
Vcc IPM
P U V W
DC 15V
P.G +8V fsw
Vin
GND
N
Figure 7. Icc Test Circuit
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10. Truth table 10.1 IGBT Control The following table shows the IGBT ON/OFF status with respect to the input signal Vin. The IGBT turn-on when Vin is at "Low" level under no alarm condition. Input (Vin) Low High 10.2 Fault Detection (1) When a fault is detected at the high side, only the detected arm stops its output. At that time the IPM dosen't any alarm. (2) When a fault is detected at the low side, all the lower arms stop their outputs and the IP outputs an alarm of the low side. Output (IGBT) ON OFF
Fault
U-phase OFF OFF OFF * * * * * * * * * * V-phase * * * OFF OFF OFF * * * * * * * W-phase * * * * * * OFF OFF OFF * * * * Low side * * * * * * * * * OFF OFF OFF OFF
Alarm Output ALM H H H H H H H H H L L L L
High side U-phase
OC UV TjOH
High side V-phase
OC UV TjOH
High side W-phase
OC UV TjOH OC
Low side
UV TjOH
Case Temperature
TcOH
*Depend on input logic.
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11. Cautions for design and application 1. Trace routing layout should be designed with particular attention to least stray capacity between the primary and secondary sides of optical isolators by minimizing the wiring length between the optical isolators and the IPM input terminals as possible.

2. Mount a capacitor between Vcc and GND of each high-speed optical isolator as close to as possible.
Vcc-GND
3. For the high-speed optical isolator, use high-CMR type one with tpHL, tpLH 0.8s.
tpHL,tpLH0.8usCMR
4. For the alarm output circuit, use low-speed type optical isolators with CTR 100%.
CTR100%
5. For the control power Vcc, use four power supplies isolated each. And they should be designed to reduce the voltage variations.
Vcc
6. Suppress surge voltages as possible by reducing the inductance between the DC bus P and N, and connecting some capacitors between the P and N terminals.
P-NP-N
7. To prevent noise intrusion from the AC lines, connect a capacitor of some 4700pF between the three-phase lines each and the ground.
AC
8. At the external circuit, never connect the control terminal GNDU to the main terminal U-phase, GNDV to V-phase, GNDW to W-phase, and GND to N-phase. Otherwise, malfunctions may be caused.
VVWW N
9. Take note that an optical isolator's response to the primary input signal becomes slow if a capacitor is connected between the input terminal and GND.
-GND
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10. Taking the used isolator's CTR into account, design with a sufficient allowance to decide the primary forward current of the optical isolator.
CTR
11. Apply thermal compound to the surfaces between the IPM and its heat sink to reduce the thermal contact resistance.
12. Finish the heat sink surface within roughness of 10m and flatness (camber) between scre positions of 0 to +100m. If the flatness is minus, the heat radiation becomes worse due to a gap between the heat sink and the IPM. And, if the flatness is over +100m, there is a da that the IPM copper base may be deformed and this may cause a dielectric breakdown.
10um 0100um IPM 100um
Mounting holes Heat sink +100m 0
13. This product is designed on the assumption that it applies to an inverter use. Sufficient examination is required when applying to a converter use. Please contact Fuji Electric Co., if you would like to applying to converter use.

14. Please see theFuji IGBT-IPM R SERIES APPLICATION MANUAL and Fuji IGBT MODULES N SERIES APPLICATION MANUAL.
IGBT-IPM R IGBT N
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12. Example of applied circuit
20k + IF Vcc 0.1uF 10uF

P
AC200V
IPM
U
20k + IF Vcc 0.1uF 10uF
V
M
+
20k + IF Vcc 0.1uF 10uF

W
B
20k + IF Vcc 0.1uF 10uF
N
20k + IF 0.1uF 10uF
20k + IF 0.1uF 10uF
20k + IF 0.1uF 10uF
5V
1k
13. Package and Marking Please see the MT6M4140 which is packing specification of P610 & P611 & P621 package 14. Cautions for storage and transportation Store the modules at the normal temperature and humidity (5 to 35C, 45 to 75%).
(5354575%)
Avoid a sudden change in ambient temperature to prevent condensation on the module surfaces.
Avoid places where corrosive gas generates or much dust exists.
Store the module terminals under unprocessed conditions
.
Avoid physical shock or falls during the transportation.
15. Scope of application This specification is applied to the IGBT-IPM (type: 7MBP75RTB060). IGBT-IPM (7MBP75RTB060) 16. Based safety standards UL1557
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Reliability Reliability Test Items
a
Test categories
Test items 1 Terminal strength Pull force
Test methods and conditions
Reference norms EIAJ ED-4701
Test Method 401 Method Test Method 402 method Test Method 403 Condition code B
AcceptNumber ance of sample number 5 (1:0)
(Pull test) 2 Mounting Strength 3 Vibration
: 40 N (main terminal) 10 N (control terminal) Test time : 10 1 sec. Screw torque : 2.5 ~ 3.5 Nm (M5) Test time : 10 1 sec. Range of frequency : 10500 Hz Sweeping time : 15 min. Acceleration : 100 m/s2 Sweeping direction : Each X,Y,Z axis Test time : 6 hr. (2hr./direction) 4 Shock Maximum acceleration : 5000 m/s2 Pulse width 1.0 ms Direction : Each X,Y,Z axis Test time : 3 times/direction 5 Solderabitlity Solder temp. : 235 5 Immersion duration : 5.0 0.5 sec. Test time : 1 time Each terminal should be Immersed in solder within 1~1.5mm from the body. 6 Resistance to Solder temp. : 260 5 soldering heat Immersion time : 10 1sec. Test time : 1 time Each terminal should be Immersed in solder within 1~1.5mm from the body. 1 High temperature Storage temp. : 125 5 storage Test duration : 1000 hr. 2 Low temperature Storage temp. : -40 5 storage Test duration : 1000 hr. 3 Temperature Storage temp. : 85 2 humidity storage Relative humidity : 85 5% Test duration : 1000hr. 4 Unsaturated Test temp. : 120 2 pressure cooker Atmospheric pressure : 1.7x105 Pa : 85 5% Test humidity Test duration : 96 hr. 5 Temperature Test temp. : Minimum storage temp. -40 5 cycle Maximum storage temp. 125 5 Normal temp. 5 ~ 35 Dwell time : Tmin ~ TN ~ Tmax ~ TN 1hr. 0.5hr. 1hr. 0.5hr. Number of cycles : 100 cycles 6 Thermal shock +0 Test temp. : High temp. side 100 -5
+5
5 5
(1:0) (1:0)
Mechanical Tests
Test Method 404 Condition code B
5
(1:0)
Test Method 303 Condition code A
5
(1:0)
Test Method 302 Condition code A
5
(1:0)
Test Method 201 Test Method 202 Test Method 103 Test code C Test Method 103 Test code E
5 5 5
(1:0) (1:0) (1:0)
5
(1:0)
Environment Tests
Test Method 105
5
(1:0)
Test Method 307 method Condition code A
5
(1:0)
Fluid used Dipping time Transfer time Number of cycles
: : : :
Low temp. side 0 -0 Pure water (running water) 5 min. par each temp. 10 sec. 10 cycles
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Test categories AcceptReference norms Number EIAJ ance of sample ED-4701 number
Test Method 101
Test items 1 High temperature reverse bias Test temp. Bias Voltage Bias Method Test duration Test temp. Relative humidity Bias Voltage Bias Method Test duration ON time OFF time Test temp. Number of cycles
Test methods and conditions : Ta = 125 5 (Tj 150 ) : VC = 0.8xVCES : Applied DC voltage to C-E Vcc = 15V : 1000 hr. : 85 2 : 85 5 % : VC = 0.8xVCES Vcc = 15V : Applied DC voltage to C-E : 1000 hr. : 2 sec. : 18 sec. : Tj=100 5deg Tj 150 , Ta=25 5 : 15000 cycles
5
(1:0)
Endurance Tests Tests Endurance
2 Temperature humidity bias
Test Method 102 Condition code C
5
(1:0)
3 Intermitted operating life (Power cycle)
Test Method 106
5
(1:0)
Failure Failure Criteria
Item Electrical characteristic Characteristic Leakage current Saturation voltage Forward voltage Thermal resistance IGBT FWD Symbol ICES VCE(sat) VF th(j-c) th(j-c) Ioc tALM TcOH Viso Failure criteria Lower limit Upper limit LSLx0.8 LSLx0.8 LSLx0.8 USLx2 USLx1.2 USLx1.2 USLx1.2 USLx1.2 USLx1.2 USLx1.2 USLx1.2 Unit mA V V /W /W ms Note
Over Current Protection Alarm signal hold time Over heating Protection Isolation voltage Visual inspection Visual inspection Peeling Plating and the others
Broken insulation The visual sample
LSL : Lower specified limit. USL : Upper specified limit. Note : Each parameter measurement read-outs shall be made after stabilizing the components at room ambient for 2 hours minimum, 24 hours maximum after removal from the tests. And in case of the wetting tests, for example, moisture resistance tests, each component shall be made wipe or dry completely before the measurement.
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Warnings 1. This product shall be used within its absolute maximum rating (voltage, current, and temperature). This product may be broken in case of using beyond the ratings.

2. Connect adequate fuse or protector of circuit between three-phase line and this product to prevent the equipment from causing secondary destruction.

3. When studying the device at a normal turn-off action, make sure that working paths of the turn-off voltage and current are within the RBSOA specification. And ,when studying the device duty at a short-circuit current non-repetitive interruption, make sure that the paths are also within the avalanche proof(PAV) specification which is calculated from the snubber inductance, the IPM inner inductance and the turn-off current. In case of use of IGBT-IPM over these specifications, it might be possible to be broken.
RBSOA (PAV)
4. Use this product after realizing enough working on environment and considering of product's reliability life. This product may be broken before target life of the system in case of using beyond the product's reliability life.

5. If the product had been used in the environment with acid, organic matter, and corrosive gas (For example : hydrogen sulfide, sulfurous acid gas), the product's performance and appearance can not be ensured easily.

6. The thermal stress generated from rise and fall of Tj restricts the product lifetime.
You should estimate the Tj from power losses and thermal resistance, and design the inverter lifetime
within the number of cycles provided from the power cycle curve. (Technical Rep. No.: MT6M4057)
Tj (MT6M4057)
7. Never add mechanical stress to deform the main or control terminal. The deformed terminal may cause poor contact problem.

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8. According to the outline drawing, select proper length of screw for main terminal. Longer screws may break the case.

9. If excessive static electricity is applied to the control terminals, the devices can be broken. Implement some countermeasures against static electricity.

Caution 1. Fuji Electric is constantly making every endeavor to improve the product quality and reliability. However, semiconductor products may rarely happen to fail or malfunction. To prevent accidents causing injury or death, damage to property like by fire, and other social damage resulted from a failure or malfunction of the Fuji Electric semiconductor products, take some measures to keep safety such as redundant design, spread-fire-preventive design, and malfunction-protective design.

2. The application examples described in this specification only explain typical ones that used the Fuji Electric products. This specification never ensure to enforce the industrial property and other rights, nor license the enforcement rights.

3. The product described in this specification is not designed nor made for being applied to the equipment or systems used under life-threatening situations. When you consider applying the product of this specification to particular used, such as vehicle-mounted units, shipboard equipment, aerospace equipment, medical devices, atomic control systems and submarine relaying equipment or systems, please apply after confirmation of this product to be satisfied about system construction and required reliability.

If there is any unclear matter in this specification, please contact Fuji Electric Co., Ltd.
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